/**
 * @file usr_mos_dri_boost.c
 * @author 黑马小乌龟 (532352406@qq.com)
 * @brief 
 * @version 0.1
 * @date 2025-07-16
 * 
 * @copyright Copyright (c) 2025
 * 
 */
#include "usr_mos_dri_boost.h"

/**
 * @brief  TimerA interrupt configuration.
 * @param  None
 * @retval None
 */
static void TmrAIrqConfig(void){
    NVIC_ClearPendingIRQ(TMRA_INT_IRQn);
    NVIC_SetPriority(TMRA_INT_IRQn, TMRA_INT_PRIO);
    NVIC_EnableIRQ(TMRA_INT_IRQn);

    /* Enable the specified interrupts of TimerA. */
    TMRA_IntCmd(TMRA_UNIT, TMRA_INT_TYPE, ENABLE);
}

static uint8_t pid_period_cnt=0;

uint8_t get_pid_period_flg(void){
    uint8_t ret = pid_period_cnt;

    pid_period_cnt = 0;

    return ret;
}

void pid_process_period_timer_init(void){


    stc_tmra_init_t stcTmraInit;
    // stc_tmra_pwm_init_t stcPwmInit;

    /* 1. Enable TimerA peripheral clock. */
    FCG_Fcg2PeriphClockCmd(TMRA_PERIPH_CLK, ENABLE);

    /* 2. Set a default initialization value for stcTmraInit. */
    (void)TMRA_StructInit(&stcTmraInit);

    /* 3. Modifies the initialization values depends on the application. */
    
    stcTmraInit.sw_count.u8ClockDiv = TMRA_CLK_DIV8; /*15MHz*/
    stcTmraInit.sw_count.u8CountMode = TMRA_MD;
    stcTmraInit.sw_count.u8CountDir  = TMRA_DIR;
    stcTmraInit.u32PeriodValue = TMRA_PERIOD_VAL;
    (void)TMRA_Init(TMRA_UNIT, &stcTmraInit);

    TmrAIrqConfig();
    pid_period_cnt = 0;
    TMRA_Start(TMRA_UNIT);
}



/**
 * @brief  TimerA counter overflow/underflow IRQ handler.
 * @param  None
 * @retval None
 */
void TMRA_OVF_UDF_IRQ_HANDLER(void){
    if (TMRA_GetStatus(TMRA_UNIT, TMRA_INT_FLAG) == SET) {
        TMRA_ClearStatus(TMRA_UNIT, TMRA_INT_FLAG);
        pid_period_cnt = 1;
    }

    __DSB();  /* Arm Errata 838869 */
}
